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authorOndrej Čerman2019-11-03 23:08:16 +0100
committerOndrej Čerman2019-11-03 23:08:16 +0100
commit933c8ee51042da83948f604f4d5d0521eda2f3cc (patch)
treef352591df117963927e7a59b44de24aa60bbc77a
parentedffb163dd81e301f89107ba4e7f8599228f5a48 (diff)
Disabled power/current monitoring on unknown CPU models
-rw-r--r--zenpower.c42
1 files changed, 30 insertions, 12 deletions
diff --git a/zenpower.c b/zenpower.c
index 404f459..1f85e72 100644
--- a/zenpower.c
+++ b/zenpower.c
@@ -54,6 +54,7 @@ struct zenpower_data {
int temp_offset;
bool zen2;
bool kernel_smn_support;
+ bool amps_visible;
bool ccd1_visible, ccd2_visible;
};
@@ -81,6 +82,10 @@ static umode_t zenpower_is_visible(struct kobject *kobj,
struct zenpower_data *data = dev_get_drvdata(dev);
switch (index) {
+ case 4 ... 11: // amperage and wattage
+ if (!data->amps_visible)
+ return 0;
+ break;
case 17 ... 18: // CCD1 temperature
if (!data->ccd1_visible)
return 0;
@@ -402,6 +407,7 @@ static int zenpower_probe(struct pci_dev *pdev, const struct pci_device_id *id)
data->pdev = pdev;
data->read_amdsmn_addr = nb_index_read;
data->kernel_smn_support = false;
+ data->amps_visible = false;
data->ccd1_visible = false;
data->ccd2_visible = false;
@@ -413,18 +419,30 @@ static int zenpower_probe(struct pci_dev *pdev, const struct pci_device_id *id)
}
}
- if (boot_cpu_data.x86 == 0x17 && boot_cpu_data.x86_model == 0x71) {
- data->zen2 = true;
- swapped_addr = true;
-
- data->read_amdsmn_addr(pdev, F17H_M70H_CCD1_TEMP, &tmp);
- if ((tmp & 0xfff) > 0) {
- data->ccd1_visible = true;
- }
-
- data->read_amdsmn_addr(pdev, F17H_M70H_CCD2_TEMP, &tmp);
- if ((tmp & 0xfff) > 0) {
- data->ccd2_visible = true;
+ if (boot_cpu_data.x86 == 0x17) {
+ switch (boot_cpu_data.x86_model) {
+ case 0x1: // Zen
+ case 0x8: // Zen+
+ case 0x11: // Zen APU
+ case 0x18: // Zen+ APU
+ data->amps_visible = true;
+ break;
+
+ case 0x71: // Zen2
+ data->amps_visible = true;
+ data->zen2 = true;
+ swapped_addr = true;
+
+ data->read_amdsmn_addr(pdev, F17H_M70H_CCD1_TEMP, &tmp);
+ if ((tmp & 0xfff) > 0) {
+ data->ccd1_visible = true;
+ }
+
+ data->read_amdsmn_addr(pdev, F17H_M70H_CCD2_TEMP, &tmp);
+ if ((tmp & 0xfff) > 0) {
+ data->ccd2_visible = true;
+ }
+ break;
}
}