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authorAnthony Wang2021-12-16 08:20:44 -0600
committerAnthony Wang2021-12-16 08:20:44 -0600
commita0cdb44fc53184e014b458a8c4b3052e06b92047 (patch)
treedadf90ae0a033c57b1b4b33e70d22c83d0a9f109 /zenpower.c
parent90637b5561ecec1ae9eb252d3040d94f90e53cfa (diff)
Expose amps and ad SVI_TEL_PLANE defines for Zen3
Diffstat (limited to 'zenpower.c')
-rw-r--r--zenpower.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/zenpower.c b/zenpower.c
index 241a1d4..c842d94 100644
--- a/zenpower.c
+++ b/zenpower.c
@@ -94,6 +94,9 @@ MODULE_PARM_DESC(zen1_calc, "Set to 1 to use ZEN1 calculation");
/* ZEN3 Ryzen desktop */
#define F19H_M21H_SVI_TEL_PLANE0 (F17H_M01H_SVI + 0x10)
#define F19H_M21H_SVI_TEL_PLANE1 (F17H_M01H_SVI + 0xC)
+/* ZEN3 APU */
+#define F19H_M50H_SVI_TEL_PLANE0 (F17H_M01H_SVI + 0xC)
+#define F19H_M50H_SVI_TEL_PLANE1 (F17H_M01H_SVI + 0x10)
#define F17H_M70H_CCD_TEMP(x) (0x00059954 + ((x) * 4))
@@ -692,6 +695,10 @@ static int zenpower_probe(struct pci_dev *pdev, const struct pci_device_id *id)
} else {
dev_info(dev, "using ZEN1 calculation formula.\n");
}
+ data->amps_visible = true;
+ data->svi_core_addr = F19H_M50H_SVI_TEL_PLANE0;
+ data->svi_soc_addr = F19H_M50H_SVI_TEL_PLANE1;
+ ccd_check = 2;
break;
}
} else {